SiC-VJFETs power switching devices: an improved model and parameter optimization technique

¹ Electrical System Laboratory, UR03ES05, ENIT, Tunis, Tunisia
² Ampere, CNRS UMR 5005, INSA-Lyon, Lyon, France
³ ST Microelectronics, Cité technologique des communications ElGazella, 2088 Ariana, Tunisia

Corresponding author: Tarek.bensalah@insalien.org

Received: 10 February 2009
Accepted: 6 October 2009
Published online: 30 October 2009

Abstract

Silicon carbide junction field effect transistor (SiC-JFETs) is a mature power switch newly applied in several industrial applications. SiC-JFETs are often simulated by Spice model in order to predict their electrical behaviour. Although such a model provides sufficient accuracy for some applications, this paper shows that it presents serious shortcomings in terms of the neglect of the body diode model, among many others in circuit model topology. Simulation correction is then mandatory and a new model should be proposed. Moreover, this paper gives an enhanced model based on experimental dc and ac data. New devices are added to the conventional circuit model giving accurate static and dynamic behaviour, an effect not accounted in the Spice model. The improved model is implemented into VHDL-AMS language and steady-state dynamic and transient responses are simulated for many SiC-VJFETs samples. Very simple and reliable optimization algorithm based on the optimization of a cost function is proposed to extract the JFET model parameters. The obtained parameters are verified by comparing errors between simulations results and experimental data.