Issue |
Eur. Phys. J. Appl. Phys.
Volume 63, Number 1, July 2013
International Semiconductor Conference Dresden-Grenoble – ISCDG 2012
|
|
---|---|---|
Article Number | 14404 | |
Number of page(s) | 8 | |
DOI | https://doi.org/10.1051/epjap/2013120482 | |
Published online | 05 July 2013 |
https://doi.org/10.1051/epjap/2013120482
Variability of multilevel switching in scaled hybrid RS/CMOS nanoelectronic circuits: theory*
Chair of Electrical Engineering and Computer Systems, RWTH Aachen University, Schinkelstrasse 2, 52062 Aachen, Germany
a e-mail: heittman@eecs.rwth-aachen.de
Received:
22
October
2012
Accepted:
9
April
2013
Published online:
5
July
2013
A theory is presented which describes the variability of multilevel switching in scaled hybrid resistive-switching/CMOS nanoelectronic circuits. Variability is quantified in terms of conductance variation using the first two moments derived from the probability density function (PDF) of the RS conductance. For RS, which are based on the electrochemical metallization effect (ECM), this variability is – to some extent – caused by discrete events such as electrochemical reactions, which occur on atomic scale and are at random. The theory shows that the conductance variation depends on the joint interaction between the programming circuit and the resistive switch (RS), and explicitly quantifies the impact of RS device parameters and parameters of the programming circuit on the conductance variance. Using a current mirror as an exemplary programming circuit an upper limit of 2–4 bits (dependent on the filament surface area) is estimated as the storage capacity exploiting the multilevel capabilities of an ECM cell. The theoretical results were verified by Monte Carlo circuit simulations on a standard circuit simulation environment using an ECM device model which models the filament growth by a Poisson process.
© EDP Sciences, 2013
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