Eur. Phys. J. Appl. Phys.
Volume 27, Number 1-3, July-September 2004Tenth International Conference on Defects: Recognition, Imaging and Physics in Semiconductors (DRIP X)
|Page(s)||21 - 27|
|Published online||15 July 2004|
Ultra thin gate oxide characterization
STMicroelectronics, Central R&D labs, 850 rue Jean Monnet, BP 16, 38926
2 L2MP, IMT Technopole de Château-Gombet, 13451 Marseille, France
3 Philips semiconductors, Central R&D labs, 850 rue Jean Monnet, BP 16, 38926 Crolles, France
Corresponding author: email@example.com
Accepted: 10 February 2004
Published online: 15 July 2004
The increase of the gate leakage current of advanced CMOS technologies makes standard electrical characterization methods as C(V) measurement or charge pumping more complex and uncertain. In this paper, and based on C(V) characteristics, main elements that directly affect the electrical measurements of ultra thin MOS devices are clarified. Then, classical parameter extraction techniques are reviewed, pointing out their absolute limitations or giving potential keys of improvement.
© EDP Sciences, 2004
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