Issue |
Eur. Phys. J. Appl. Phys.
Volume 66, Number 1, April 2014
|
|
---|---|---|
Article Number | 10103 | |
Number of page(s) | 7 | |
Section | Semiconductors and Devices | |
DOI | https://doi.org/10.1051/epjap/2014130386 | |
Published online | 21 April 2014 |
https://doi.org/10.1051/epjap/2014130386
Nanostructural defects evidenced in failing silicon-based NMOS capacitors by advanced failure analysis techniques
1
Aix-Marseille Université, CNRS, IM2NP UMR 7334, Avenue Escadrille Normandie Niemen, 13397
Marseille Cedex 20, France
2
STMicroelectronics, Avenue C′elestin Coq, 13106
Rousset, France
a e-mail: christophe.muller@im2np.fr
Received:
25
August
2013
Revised:
11
February
2014
Accepted:
6
March
2014
Published online:
21
April
2014
An experimental methodology compliant with industrial constraints was deployed to uncover the origin of soft breakdown events in large planar silicon-based NMOS capacitors. Complementary advanced failure analysis techniques were advantageously employed to localize, isolate and observe structural defects at nanoscale. After an accurate localization of the failing area by optical beam-induced resistance change (OBIRCH), focused ion beam (FIB) technique enabled preparing thin specimens adequate for transmission electron microscopy (TEM). Characterization of the gate oxide microstructure was performed by highresolution TEM imaging and energy-filtered spectroscopy. A dedicated experimental protocol relying on iterative FIB thinning and TEM observation enabled improving the quality of electron imaging of defects at atom scale. In that way, the gate oxide integrity was evaluated and an electrical stress-induced silicon epitaxy was detected concomitantly to soft breakdown events appearing during constant voltage stress. The growth of silicon hillocks enables consuming a part of the breakdown energy and may prevent the soft breakdown event to evolve towards a hard breakdown that is catastrophic for device functionality.
© EDP Sciences, 2014
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