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Cited article:

Layer-engineered I-V characteristics of p-Si/WS2 Van der Waals Heterostructure diode

Sanni Kapatel, C. K. Sumesh, Pratik Pataniya, G. K. Solanki and K. D. Patel
The European Physical Journal Plus 132 (4) (2017)
https://doi.org/10.1140/epjp/i2017-11480-2