Eur. Phys. J. Appl. Phys.
Volume 81, Number 2, February 2018
|Number of page(s)||3|
|Section||Semiconductors and Devices|
|Published online||08 June 2018|
Eliminating failure behavior by introducing CdS inter-layer in Cu2O-based memory cell
School of electronics and information technology, State Key Lab of Optoelectronics Materials & Technologies, Sun Yat-Sen University,
Guangzhou, PR China
2 Xiangtan University, 411105 Xiangtan, PR China
* e-mail: firstname.lastname@example.org
Received in final form: 3 March 2018
Accepted: 2 April 2018
Published online: 8 June 2018
Resistive switching random access memory (RRAM) has attracted great attention due to its outstanding performance for the next generation non-volatile memory. However, the unexpected failure behaviors seriously hinder the further studies and applications of this new memory device. In this work, the bipolar resistive switching characteristics in Pt/CdS/Cu2O/FTO cells are investigated. The CdS inter-layer is used to suppress the failure behavior in set process. Comparing to the Pt/Cu2O/FTO cell, the switching process in Pt/CdS/Cu2O/FTO cell is not affected even at a high set voltage and the failure behavior is eliminated effectively. Therefore, this work proposes a feasible approach to solve the failure problem in RRAM.
© EDP Sciences, 2018
Current usage metrics show cumulative count of Article Views (full-text article views including HTML views, PDF and ePub downloads, according to the available data) and Abstracts Views on Vision4Press platform.
Data correspond to usage on the plateform after 2015. The current usage metrics is available 48-96 hours after online publication and is updated daily on week days.
Initial download of the metrics may take a while.