Regular Article

Eliminating failure behavior by introducing CdS inter-layer in Cu₂O-based memory cell

¹ School of electronics and information technology, State Key Lab of Optoelectronics Materials & Technologies, Sun Yat-Sen University, 510006 Guangzhou, PR China
2 Xiangtan University, 411105 Xiangtan, PR China

^* e-mail: danwei861016@163.com

Received: 7 January 2018
Received in final form: 3 March 2018
Accepted: 2 April 2018
Published online: 8 June 2018

Abstract

Resistive switching random access memory (RRAM) has attracted great attention due to its outstanding performance for the next generation non-volatile memory. However, the unexpected failure behaviors seriously hinder the further studies and applications of this new memory device. In this work, the bipolar resistive switching characteristics in Pt/CdS/Cu₂O/FTO cells are investigated. The CdS inter-layer is used to suppress the failure behavior in set process. Comparing to the Pt/Cu₂O/FTO cell, the switching process in Pt/CdS/Cu₂O/FTO cell is not affected even at a high set voltage and the failure behavior is eliminated effectively. Therefore, this work proposes a feasible approach to solve the failure problem in RRAM.