Hall effect sensors integrated in standard technology and optimized with on-chip circuitry^*

¹ Institut d'Électronique, du Solide et des Systèmes (InESS), 23 rue du Lœss, BP 20, 67037 Strasbourg Cedex 2, France
² Laboratoire d'Instrumentation Électronique de Nancy (LIEN), Faculté des Sciences et Techniques, BP 239, 54506 Vandœuvre-les-Nancy Cedex, France

Corresponding authors: jean-baptiste.kammerer@iness.c-strasbourg.fr philippe.poure@lien.uhp-nancy.fr

Received: 9 March 2005
Revised: 23 December 2005
Accepted: 24 March 2006
Published online: 6 October 2006

Abstract

While silicon is not the best semi-conductor material to design Hall effect sensors, it is widely used because Hall devices are fully compatible with standard processes such as CMOS or Bi-CMOS. Hall effect sensors can thus take advantage of on-chip circuitry to counterbalance the poor intrinsic metrological characteristics of silicon Hall devices, and low cost integrated smart magnetometers can be designed using standard technologies. Conventional Hall plate as well as the spinning-current method, which is the present state of the art technique to improve performances of integrated Hall devices, are reviewed in this paper. Then a new multi-strips Hall device and its specific biasing circuit are introduced. This new device allows to multiply by n the absolute sensitivity of the Hall sensor where n is the number of strips, but it suffers from offset. To overcome this drawback, a Hall sensors network which also allows to increase the sensitivity while reducing the offset is proposed. Finally a comparison between the Hall sensors network and the spinning-current is done, showing that both techniques are complementary and should be combined to design high resolution Hall sensor systems.