Issue |
Eur. Phys. J. AP
Volume 8, Number 2, September 1999
|
|
---|---|---|
Page(s) | 139 - 145 | |
DOI | https://doi.org/10.1051/epjap:1999239 | |
Published online | 15 September 1999 |
https://doi.org/10.1051/epjap:1999239
Fabrication of co-planar metal-insulator-metal solid state nanojunctions down to 5 nm
1
CEMES-CNRS, 29 rue Jeanne Marvig, B.P. 4347, 31055 Toulouse Cedex, France
2
LAAS-CNRS, 7 avenue du Colonel Roche, 31077 Toulouse Cedex, France
Received:
18
March
1999
Revised:
13
September
1999
Accepted:
13
September
1999
Published online: 15 September 1999
An optimised process is presented to fabricate co-planar metal-insulator-metal nanojunctions down to an inter-electrode distance of 5 nm. Simulation of the e-beam insulation of the PMMA/SiO2/Si interface is used to optimise the PMMA resist thickness and the exposure strategy. The process was well stabilised to provide a full statistical analysis of the number of nanojunctions produced per wafer. A 10% throughput was reached for 5 nm giving a mass production of about 100 nanojunctions per 2 inches wafer all equipped with their interconnection pads.
PACS: 85.40.Ux – Nanometer-scale fabrication technology
© EDP Sciences, 1999
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