Low frequency noise modeling of polycrystalline silicon thin-film transistors

¹ Department of Electronic Engineering, College of Information Science and Technology, Jinan University, Guangzhou 510630, P.R. China
² South China University of Technology, Guangzhou 510640, P.R. China

Corresponding author: dwanl@126.com

Received: 21 January 2009
Accepted: 27 April 2009
Published online: 8 July 2009

Abstract

A modified and improved low frequency model for polycrystalline silicon thin-film transistors (poly-Si TFTs) is developed in this paper. For small grain size poly-Si TFTs, based on carrier number fluctuations, an improvement of the standard low frequency noise model has been investigated to explain the noise characteristics of poly-Si TFTs. An exponential energy distribution for interface density of states is employed to model the interface trap capacitance. For large grain size devices, mobility fluctuations related to fluctuations of the grain boundary charges is used to describe the excess subthreshold noise. The anomalous noise increase behavior of poly-Si TFTs when operated in the kink regime is also studied and modeled. The proposed model and the experimental data agree well over a wide range of operation regimes.