Articles citing this article

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Cited article:

Nonvolatile flip-flop based on pseudo-spin-transistor architecture and its nonvolatile power-gating applications for low-power CMOS logic

Shuu’ichirou Yamamoto, Yusuke Shuto, Satoshi Sugahara

Eur. Phys. J. Appl. Phys., 63 1 (2013) 14403

Published online: 2013-07-05

DOI: https://doi.org/10.1051/epjap/2013120486

This article has been cited by the following article(s):

Handbook of Spintronics

Satoshi Sugahara, Yota Takamura, Yusuke Shuto and Shuu’ichirou Yamamoto
Handbook of Spintronics 1 (2014)
DOI: 10.1007/978-94-007-7604-3_44-1
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Handbook of Spintronics

Satoshi Sugahara, Yota Takamura, Yusuke Shuto and Shuu’ichirou Yamamoto
Handbook of Spintronics 1243 (2016)
DOI: 10.1007/978-94-007-6892-5_44
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Nanomagnetic and Spintronic Devices for Energy-Efficient Memory and Computing

Satoshi Sugahara, Yusuke Shuto and Shuu'ichirou Yamamoto
Nanomagnetic and Spintronic Devices for Energy-Efficient Memory and Computing 65 (2016)
DOI: 10.1002/9781118869239.ch3
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Design and energy-efficient architectures for nonvolatile static random access memory using magnetic tunnel junctions

Daiki Kitagata, Shuu’ichirou Yamamoto and Satoshi Sugahara
Japanese Journal of Applied Physics 58 (SB) SBBB12 (2019)
DOI: 10.7567/1347-4065/ab00f5
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Yusuke Shuto, Shuu'ichirou Yamamoto and Satoshi Sugahara
1 (2015)
DOI: 10.1109/E3S.2015.7336784
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Yusuke Shuto, Shuu'ichirou Yamamoto and Satoshi Sugahara
136 (2016)
DOI: 10.1109/ICMTS.2016.7476193
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